upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 256

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 7
256
Figure 7-4
Caution
Note
(2)
Programmable peripheral I/O area (PPA)
The usage and the address range of the PPA is configurable. The PPA extends
the fixed peripheral I/O area and assigns an additional 12 KB address space
for accessing on-chip peripherals.
The figure below illustrates the programmable peripheral I/O area (PPA).
Programmable peripheral I/O area
The CAN modules registers and message buffers are allocated to the PPA.
Refer to “CAN module register and message buffer addresses” on page 666
for information how the calculate the register and message buffer addresses of
the CAN modules.
If the programmable peripheral I/O area overlaps one of the following areas,
the programmable peripheral I/O area becomes ineffective:
1.
2.
Preliminary User’s Manual U17566EE1V2UM00
•
•
•
The fixed peripheral I/O area is mirrored to the upper 4 KB of the
programmable peripheral I/O area – regardless of the base address of the
PPA. If data is written in one area, data having the same contents is also
written in the other area.
All address definitions in this manual that refer to the programmable
peripheral area assume that the base address of the PPA is 03FE C000
that means BPC = 8FFB
Peripheral I/O area
ROM area
RAM area
base + 3FFFH
base of PPA
3FF EFFFH
3FF FFFFH
3FF F000H
000 0000H
Programmable
I/O register
I/O register
Peripheral
peripheral
(16 KB)
(4 KB)
H
.
same area
Bus and Memory Control (BCU, MEMC)
NPB (NEC Periheral Bus)
Programmable
Peripheral
peripheral
I/O area
I/O area
(4 KB)
x1200H
x3FFFH
x3000H
x2FFFH
x11FFH
x0000H
Dedicated area for
FCAN controller
H
,