upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 574

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 18
574
Table 18-1
18.2 I
The I
drain output pins simultaneously. In the following the pin configuration registers
are listed to be set up properly for I
• PFSR0.PFSR04/5 = 1/0: select input for I
• PLCDCn.PLCDCnm = 0: no LCD output (where applicable)
• PFCn.PFCnm = 1/0: select ALT1-/ALT2-OUT (where applicable)
• PMCn.PMCnm = 1: alternative mode
• PICCn.PICCnm = 0: non-Schmitt Trigger input
• PDSCn.PDSCnm = 1: drive strength control Limit2
• PODCn.PODCnm = 1: open drain output
• PMn.PMnm = 1: input mode
It is recommended to set the output mode as the last step.
Table 17-3 shows how to set up the registers for activating I
different pin groups.
I
Preliminary User’s Manual U17566EE1V2UM00
I
I
I
2
2
2
2
2
C interface pins set up
Cn PFSR0 register
C0 PFSR0.PFSR04 = 0 SDA0/SCL0 via P16/P17 PMC1.PMC1[7:6] = 11
C1 PFSR0.PFSR05 = 0 SDA1/SCL1 via P20/P21 PLCDC2.PLCDC2[1:0] = 00
C Pin Configuration
2
C function requires to define the pins SCLn and SDAn as input and open
PFSR0.PFSR04 = 1 SCL0/SDA0 via P64/P65 PLCDC6.PLCDC6[5:4] = 00
PFSR0.PFSR05 = 1 SDA1/SCL1 via P30/P31 PFC3.PFC30 = 1
Pins and pin group
2
C:
2
Cn (where applicable)
Register settings
PICC1.PICC1[7:6] = 00
PDSC1.PDSC1[7:6] = 11
PODC1.PODC1[7:6] = 11
PM1.PM1[7:6] = 11
PFC6.PFC6[5:4] = 00
PMC6.PMC65 = 1
PICC6.PICC6[5:4] = 00
PDSC6.PDSC6[5:4] = 11
PODC6.PODC6[5:4] = 11
PM6.PM6[5:4] = 11
PMC2.PMC2[1:0] = 11
PICC2.PICC2[1:0] = 00
PDSC2.PDSC2[1:0] = 11
PODC2.PODC2[1:0] = 11
PM2.PM2[1:0] = 11
PMC3.PMC3[1:0] = 11
PICC3.PICC3[1:0] = 00
PDSC3.PDSC3[1:0] = 11
PODC3.PODC3[1:0] = 11
PM3.PM3[1:0] = 11
2
C0 and I
I
2
C Bus (IIC)
B
B
B
B
B
B
2
C1 from
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B