upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 601
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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I
2
C Bus (IIC)
18.7.1 Master device operation
18.7 I
(1)
The following shows the value of the IICSn register at the INTIICn interrupt
request signal generation timing and at the INTIICn signal timing.
Start ~ Address ~ Data ~ Data ~ Stop (normal transmission/reception)
Preliminary User’s Manual U17566EE1V2UM00
2
C Interrupt Request Signals (INTIICn)
<1> When WTIMn bit = 0
<2> When WTIMn bit = 1
ST
ST
▲1: IICSn register = 10XXX110B
▲2: IICSn register = 10XXX000B
▲3: IICSn register = 10XXX000B (WTIMn bit = 1)
▲4: IICSn register = 10XXXX00B
Δ 5: IICSn register = 00000001B
▲1: IICSn register = 10XXX110B
▲2: IICSn register = 10XXX100B
▲3: IICSn register = 10XXXX00B
Δ 4: IICSn register = 00000001B
Remarks 1. ▲: Always generated
Remarks 1. ▲: Always generated
AD6 to AD0
AD6 to AD0
2. n = 0 to 2
2. n = 0 to 2
Δ: Generated only when SPIEn bit = 1
X: don’t care
Δ: Generated only when SPIEn bit = 1
X: don’t care
RW
RW
AK
AK
▲1
▲1
D7 to D0
D7 to D0
▲2
AK
AK
▲2
D7 to D0
D7 to D0
▲3
SPTn bit = 1
SPTn bit = 1
AK
AK
Chapter 18
▲4
▲3
↓
↓
SP
SP
601
Δ5
Δ4
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