upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 185

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Clock Generator
Main oscillator
Main oscillator
monitor start
monitor start
Figure 4-2
4.4.4 Operation of the Clock Monitors
(1)
(2)
The microcontroller provides two separate clock monitors to watch the activity
of the main oscillator and the sub oscillator.
Description
The functional block diagram is shown below.
Clock Monitors Block Diagram
The clock monitors use the ring oscillator (f
oscillators (f
If the main oscillator clock monitor detects a malfunction of the main oscillator
(no pulse), it generates the reset request RESCMM. If the sub oscillator clock
monitor detects a malfunction of the sub oscillator, it generates the reset
request RESCMS.
Start and stop
Before the clock monitors can be started, they have to be enabled by setting
CLMM.CLMEM and CLMS.CLMES to 1.
After enabling CLMM.CLMEM = 1 the main oscillator monitor is automatically
started as soon as the main oscillator is stable, indicated by
CGSTAT.OSCSTAT = 1.
After enabling CLMM.CLMES = 1 the sub oscillator monitor must be started by
software by setting CLMCS.CMRT to 1.
After starting the sub oscillator clock monitor by CLMCS.CMRT = 1 clear
CLMCS.CMRT by software.
Preliminary User’s Manual U17566EE1V2UM00
CGSTAT.OSCSTAT
CLMM.CLMEM
CLMCS.CMRT
CLMS.CLMES
M
main osc
).
ring osc
sub osc
f
start
f
f
start
f
M
R
M
R
CLKM_MAIN
CLKM_SUB
R
EN
EN
) for monitoring the main and sub
output
output
RESCMM
RESCMS
Chapter 4
185