upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 72

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upd70f3422gj-gae-qs-ax

Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
Chapter 2
72
Table 2-22
a)
P00 (I/O)
P01 (I/O)
P02 (I/O)
P03 (I/O)
P04 (I/O)
P05 (I/O)
P06 (I/O)
P07 (I/O)
(PMCnm = 0)
Port mode
2.4.4 Port group 0
Note
The pin function after reset depends on the reset source, that means on bit OCDM.OCDM0. Re-
fer to “OCDM - On-chip debug mode register“ on page 45 and to the “On-Chip Debug Unit“ on
page 877.
• Port group 0 is an 8-bit port group. In alternative mode, it comprises pins for
• External interrupt (INTP0 to INTP6)
• Non-maskable interrupt (NMI)
• N-Wire debug interface reset (DRST)
• Output state of internal Voltage Comparator 0 (VCMPO0)
Port group 0 includes the following pins:
Port group 0: pin functions and port types
1.
2.
Preliminary User’s Manual U17566EE1V2UM00
the following functions:
The setting of bit OCDM.OCDM0 applies only to pins of port type R.
For configuring P00 as NMI and/or INTP0 refer also to “Edge and Level
Detection Configuration“ on page 218.
VCMPO0
Pin functions in different modes
Output mode
(PMnm = 0)
Alternative mode
(PMCnm = 1)
INTP0/NMI
INTP1
INTP2
INTP3
INTP4
INTP5
INTP6
Input mode
(PMnm = 1)
DRST (I)
debug mode
(OCDM0 = 1)
On-chip
P00 (I)
P01 (I)
P02 (I)
P03 (I)
P04 (I)
P05 or
DRST (I)
P06 (I)
P07 (I)
Pin function
after reset
a
Pin Functions
Port type
M
M
M
M
M
M
M
R

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