upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 419

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

16-bit Timer/Event Counter P (TMP)
(i) Operation to write 0 (without conflict with setting)
(ii) Operation to write 0 (conflict with setting)
Overflow flag
(TPnOVF bit)
Overflow flag
(TPnOVF bit)
0 write signal
0 write signal
set signal
set signal
Overflow
Overflow
L
(e) Clearing overflow flag
Preliminary User’s Manual U17566EE1V2UM00
The overflow flag can be cleared to 0 by clearing the TPnOVF bit to 0 with
the CLR instruction and by writing 8-bit data (bit 0 is 0) to the TPnOPT0
register. To accurately detect an overflow, read the TPnOVF bit when it is 1,
and then clear the overflow flag by using a bit manipulation instruction.
To clear the overflow flag to 0, read the overflow flag to check if it is set to 1,
and clear it with the CLR instruction. If 0 is written to the overflow flag
without checking if the flag is 1, the set information of overflow may be
erased by writing 0 ((ii) in the above chart). Therefore, software may judge
that no overflow has occurred even when an overflow actually has
occurred.
If execution of the CLR instruction conflicts with occurrence of an overflow
when the overflow flag is cleared to 0 with the CLR instruction, the overflow
flag remains set even after execution of the clear instruction.
(iii) Operation to clear to 0 (without conflict with setting)
(iv) Operation to clear to 0 (conflict with setting)
access signal
access signal
(TPnOVF bit)
(TPnOVF bit)
Overflow flag
Overflow flag
0 write signal
0 write signal
set signal
set signal
Overflow
Overflow
Register
Register
L
H
Read
Read
Write
Write
Chapter 11
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