upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 545

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Clocked Serial Interface (CSIB)
Bit position
4
1
0
Table 17-3
Bit name
CBnTMS
CBnSCE
CBnDIR
CBnCTL0 register contents (2/2)
Preliminary User’s Manual U17566EE1V2UM00
Function
Transfer direction mode specification (MSB/LSB):
Transfer direction mode specification (MSB/LSB):
Transfer direction mode specification (MSB/LSB):
• In master mode
• In slave mode
0: MSB first transfer
1: LSB first transfer
0: Single transfer mode
1: Continuous transfer mode
0: Communication start trigger invalid
1: Communication start trigger valid
This bit enables or disables the communication start trigger.
(a)In single transmission or transmission/reception mode, or continuous
(b)In single reception mode
(c)In continuous reception mode
This bit enables or disables the communication start trigger.
Set the CBnSCE bit to 1.
transmission or continuous transmission/reception mode
A communication operation can be started only when the CBnSCE bit is
1.
Set the CBnSCE bit to 1.
Clear the CBnSCE bit to 0 before reading the receive data
(CBnRX register).
If the CBnSCE bit is read while it is 1, the next communication operation is
started.
Clear the CBnSCE bit to 0 one communication clock before reception of
the last data is completed
The CBnSCE bit is not cleared to 0 one communication clock before the
completion of the last data reception, the next communication operation is
automatically started.
Chapter 17
545