upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 135

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Clock Generator
4.1.5 Start-up guideline
After reset release, the internal firmware starts the main oscillator, but hands
over control to the user’s software without ensuring that the main oscillator has
stabilized.
After that, the user’s software will typically:
1. Ensure that the main oscillator has stabilized (check CGSTAT.OSCSTAT).
2. Switch the source of LCDCLK/WTCLK and WDTCLK to main oscillator (if
3. Start the PLL (set CKC.PLLEN) and wait until the PLL has stabilized (refer
4. If the SSCG is going to be used:
5. Write the PCC register to specify the SSCG as the clock source for the
6. Set up the clock sources for the peripherals according to application
7. The default value of following registers must be changed after reset:
Preliminary User’s Manual U17566EE1V2UM00
desired).
to the Electrical Target Specification).
Write SSCG registers to set up the SSCG. This is only possible when the
SSCG is switched off.
Start the SSCG (set CKC.SCEN) and wait until the SSCG has stabilized
(refer to the Electrical Target Specification).
Set up the SSCG post clock divider by SCPS.VBSPS[2:0].
CPU.
requirements.
– WCC.bit1 = 1 (refer to “Control registers for peripheral clocks” on
– ADA0M1.bit1 = 1 (refer to “ADC Registers” on page 773)
page 150)
Chapter 4
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