upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 537
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Asynchronous Serial Interface (UARTA)
baud rate
153,600
312,500
Target
19,200
31,250
38,400
76,800
[bps]
1,200
2,400
4,800
9,600
300
600
Table 16-9
Caution
16.6.5 Baud rate setting example
16.6.6 Allowable baud rate range during reception
Note
Selector
07H
07H
07H
07H
06H
05H
04H
05H
03H
02H
01H
00H
Baud rate generator setting data
UAnCTL1
Table 16-9 assumes normal operation mode, i.e. PCLK1=8MHz.
The baud rate error range at the destination that is allowable during reception
is shown below.
The baud rate error during reception must be set within the allowable error
range using the following equation.
Preliminary User’s Manual U17566EE1V2UM00
Divider
128
128
128
128
64
32
16
32
8
4
2
1
1AH
0DH
0DH
0DH
0DH
0DH
0DH
0DH
0DH
68H
34H
04H
UAnCTL2
Divider k
104
52
26
13
13
13
13
13
13
13
13
4
153,846.15
307,692.31
19,230.77
31,250.00
38,461.54
76,923.08
baud rate
Effective
1,201.92
2,403.85
4,807.69
9,615.38
300.48
600.96
[bps]
Baud rate error
Chapter 16
–1.54
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.00
0.16
0.16
0.16
(%)
537
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