upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 122

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 3
122
Caution
(6)
(7)
5.
1.
2.
Programmable peripheral I/O area
A 16 KB area is provided as a programmable peripheral I/O area (PPA). The
PPA can be freely located. The base address of the programmable peripheral
I/O area is specified by the initialization of the peripheral area selection control
register (BPC).
See “Bus and Memory Control (BCU, MEMC)“ on page 249 for details.
External memory area (µPD70F3427 only)
All address areas that do not address any internal memory or peripheral I/O
registers can be used as external memory area.
Access to the external memory area uses the chip select (CS) signals
assigned to each memory area.
For access to external memory, see “Bus and Memory Control (BCU, MEMC)“
on page 249.
Preliminary User’s Manual U17566EE1V2UM00
Addresses that are not defined as registers are reserved for future
expansion. If these addresses are accessed, the operation is undefined and
not guaranteed.
For DMA transfer, the fixed peripheral I/O area 03FF F000
cannot be specified as the source/destination address. Be sure to use the
RAM area 0FFF F000
DMA transfer.
For registers in which byte access is possible, if half word access is
executed:
•
•
During read operation: The higher 8 bits become undefined.
During write operation: The lower 8 bits of data are written to the
register.
H
to 0FFF FFFF
H
for source/destination address of
CPU System Functions
H
to 03FF FFFF
H