upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 737

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

CAN Controller (CAN)
19.16.1 Baud rate setting conditions
Caution
19.16 Baud Rate Settings
Note
The time stamp function using the TSLOCK bit stops toggle of the TSOUT
signal by receiving a data frame in message buffer 0. Therefore, message
buffer 0 must be set as a receive message buffer. Since a receive message
buffer cannot receive a remote frame, toggle of the TSOUT signal cannot be
stopped by reception of a remote frame. Toggle of the TSOUT signal does not
stop when a data frame is received in a message buffer other than message
buffer 0.
For these reasons, a data frame cannot be received in message buffer 0 when
the CAN module is in the normal operation mode with ABT, because message
buffer 0 must be set as a transmit message buffer. In this operation mode,
therefore, the function to stop toggle of the TSOUT signal by the TSLOCK bit
cannot be used.
Make sure that the settings are within the range of limit values for ensuring
correct operation of the CAN Controller, as follows.
• 5TQ ≤ SPT (sampling point) ≤ 17 TQ
• 8 TQ ≤ DBT (data bit time) ≤ 25 TQ
• 1 TQ ≤ SJW (synchronization jump width) ≤ 4TQ
• 4 ≤ TSEG1 ≤ 16 [3 ≤ Setting value of TSEG1[3:0] ≤ 15]
• 1 ≤ TSEG2 ≤ 8 [0 ≤ Setting value of TSEG2[2:0] ≤ 7]
1.
2.
3.
Preliminary User’s Manual U17566EE1V2UM00
SPT = TSEG1 + 1
DBT = TSEG1 + TSEG2 + 1TQ = TSEG2 + SPT
SJW ≤ DBT – SPT
TQ = 1/f
TSEG1[3:0] (CnBTR.TSEG13 to CnBTR.TSEG10 bits)
TSEG2[2:0] (CnBTR.TSEG22 to CnBTR.TSEG20 bits)
TQ
(f
TQ
: CAN protocol layer basic system clock)
Chapter 19
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