upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 507
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
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Chapter 16 Asynchronous Serial Interface (UARTA)
16.1 Features
Preliminary User’s Manual U17566EE1V2UM00
The V850E/Dx3 microcontrollers have following instances of the universal
Asynchronous Serial Interface UARTA:
Throughout this chapter, the individual instances of UARTA are identified by
“n”, for example, UARTAn, or UAnCTL0 for the UARTAn control register 0.
• Transfer rate: 300 bps to 1000 kbps (using dedicated baud rate generator)
• Full-duplex communication:
• 2-pin configuration:
• Reception error output function
• Interrupt sources: 3
• Character length: 7, 8 bits
• Parity function: Odd, even, 0, none
• Transmission stop bit: 1, 2 bits
• On-chip dedicated baud rate generator
• MSB-/LSB-first transfer selectable
• Transmit/receive data inverted input/output possible
UARTA
Instances
Names
– Internal UARTA receive data register n (UAnRX)
– Internal UARTA transmit data register n (UAnTX)
– TXDAn: Transmit data output pin
– RXDAn: Receive data input pin
– Parity error
– Framing error
– Overrun error
– Reception complete interrupt (INTUAnR):
– Transmission enable interrupt (INTUAnT):
– Receive error interrupt (INTUAnRE):
This interrupt occurs upon transfer of receive data from the shift register
to receive buffer register n after serial transfer completion, in the reception
enabled status.
This interrupt occurs upon transfer of transmit data from the transmit
buffer register to the shift register in the transmission enabled status.
This interrupt occurs upon transfer of erroneous receive data.
UARTA0 to UARTA1
All devices
2
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