upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 882

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upd70f3422gj-gae-qs-ax

Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
Chapter 28
882
Bit name
Reset value
Table 28-2
Address
28.2 Controlling the N-Wire Interface
(1)
(2)
7
0
0
The N-Wire interface pins DRST, DDI, DDO, DCK, DMS are shared with port
functions, see Table 28-2. During debugging the respective device pins are
forced into the N-Wire interface mode and port functions are not available.
Note that N-Wire debugging must be generally permitted by the security bit in
the ID code region (*0x0000 0079[bit7] = 1) of the flash memory.
An internal pull-down resistor - detachable by software - is provided at the
DRST pin to keep the N-Wire interface in reset, if no debugger is connected.
N-Wire interface pins
OCDM - On-chip debug mode register
The OCDM0 control bit in the OCDM register determines the function of these
device pins.
The register can be read or written in 8-bit and 1-bit units.
FFFF F9FC
a)
The reset value of OCDM.OCDM0 depends on the reset source.
Power-On-Clear RESPOC
RESPOC (Power-On-Clear) reset sets OCDM.OCDM0 = 0, i.e. the pins are
defined as port pins. The debugger can not communicate with the controller
and the N-Wire debug circuit is disabled. The first CPU instructions after
RESPOC can not be controlled by the debugger. The application software
must set OCDM.OCDM0 = 1 in order to enable the N-Wire interface and allow
debugger access to the on-chip debug unit.
During and after POC reset (OCDM.OCDM0 = 0) pins P05, P52…P55 are
configured as input ports.
Preliminary User’s Manual U17566EE1V2UM00
Reset value depends on reset source (see below)
OCDM0
GPIO
0
1
P05
P52
P53
P54
P55
6
0
0
H
Usage of N-Wire pins
Pins used as port/alternative function pins
Pins used as N-Wire interface pins
5
0
0
DRST
DDO
DMS
DCK
DDI
Pin
4
0
0
Direction
Output
Input
Input
Input
Input
N-Wire function
3
0
0
N-Wire RCU reset
N-Wire debug data in
N-Wire debug data out
N-Wire interface clock
N-Wire mode
2
0
0
On-Chip Debug Unit
Description
1
0
0
OCDM0
0/1
0
a

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