upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 45

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Pin Functions
Initial Value
Table 2-8
Address
Access
Note
(5)
OCDM - On-chip debug mode register
The 8-bit OCDM register specifies whether dedicated pins of the
microcontroller operate in normal operation mode or can be used for on-chip
debugging (N-Wire interface). The setting of this register concerns only those
pins that can be used for the N-Wire interface: P05/DRST, P52/DDI, P53/DDO,
P54/DCK, and P55/DMS.
To make these pins available for on-chip debugging, bit OCDM.OCDM0 must
be set while pin DRST is high. If the on-chip debug mode is selected, the
corresponding pins are automatically set as input or output pins, respectively.
Setting of bits PMn.PMnm is not necessary.
For more details refer to “On-Chip Debug Unit“ on page 877.
This register can be read/written in 8-bit and 1-bit units.
FFFF F9FC
00
• After Power-On Clear reset, the normal operation mode is selected
• After external reset, the dedicated pins are available for on-chip debugging
• After any other reset, bit OCDM0 holds the same value as before the reset.
OCDM register contents
If the pins P05/DRST, P52/DDI, P53/DDO, P54/DCK, and P55/DMS are used
as N-Wire interface pins their configuration can not be changed by the pin
configuration registers.
Preliminary User’s Manual U17566EE1V2UM00
Bit position
H
R/W
(OCDM.OCDM0 = 0).
(OCDM.OCDM0 = 1).
/01
7
0
0
H
:
R/W
H
6
0
Bit name
OCDM0
R/W
5
0
R/W
Enables/disables N-Wire interface:
0: Pins are used in normal operation mode (port
1: Pins are used in on-chip debug mode.
4
0
mode or alternative mode).
R/W
3
0
R/W
2
0
Function
R/W
1
0
OCDM0
R/W
0
Chapter 2
45