upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 432
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Chapter 12
432
Bit position
2 to 0
7
Initial Value
Table 12-3
Address
Access
TZCKS[2:0]
Bit name
Note
TZCE
(1)
TZnCTL - TMZn timer control register
The 8-bit TZnCTL register controls the operation of the Timer Z.
This register can be read/written in 8-bit or 1-bit units.
<base> + 6
00
TZnCTL register contents
Change bits TZnCTL.TZCKS[2:0] only when TZnCTL.TZCE = 0.
When TZnCTL.TZCE = 0, it is possible to select the clock and enable the
counter with one write operation.
Preliminary User’s Manual U17566EE1V2UM00
TZCE
H
R/W
. This register is cleared by any reset.
7
Function
Timer Z counter enable:
Selects the counter clock:
0: Disable count operation (the timer stops immediately with the count value
1: Enable count operation (the timer starts when a non-zero start value is written
0000
to the register TZnR after TZnCTL.TZCE=1).
TZCKS2
H
0
0
0
1
1
H
R
6
0
and does not operate).
Others than above
TZCKS1
R
5
0
0
1
1
0
0
R
TZCKS0
4
0
0
0
1
0
1
R
3
0
Counter clock selection
PCLK2 (4 MHz)
PCLK4 (1 MHz)
PCLK5 (0.5 MHz)
PCLK7 (0.125 MHz)
PCLK9 (31.250 KHz)
Setting prohibited
TZCKS2
16-bit Interval Timer Z (TMZ)
R/W
2
TZCKS1
R/W
1
TZCKS0
R/W
0
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