upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 209
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Interrupt Controller (INTC)
Interrupt request a (level 2)
Interrupt request b (level 1)
Interrupt request c (level 1)
Default priority
a > b > c
Figure 5-9
Caution
Caution
Remark
Note
Main routine
The values of the EIPC and EIPSW registers must be saved before executing
multiple interrupts. When returning from multiple interrupt servicing, restore the
values of EIPC and EIPSW after executing the DI instruction.
1.
2.
Example of processing interrupt requests simultaneously generated
The values of the EIPC and EIPSW registers must be saved before executing
multiple interrupts. When returning from multiple interrupt servicing, restore the
values of EIPC and EIPSW after executing the DI instruction.
<a> to <c> in the figure are the temporary names of interrupt requests shown
for the sake of explanation.
Preliminary User’s Manual U17566EE1V2UM00
EI
Lower default priority
Higher default priority
NMI request
Processing of interrupt request b
Processing of interrupt request c
Processing of interrupt request a
.
.
Interrupt request b and c are
acknowledged first according to
their priorities.
Because the priorities of b and c are
the same, b is acknowledged first
according to the default priority.
Chapter 5
209
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