upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 415

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upd70f3422gj-gae-qs-ax

Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
16-bit Timer/Event Counter P (TMP)
Figure 11-33
TPnCCR0 register
TPnCCR1 register
INTTPnOV signal
TPnOVF0 flag
TPnOVF1 flag
TIPn0 pin input
TIPn1 pin input
16-bit counter
Note
TPnOVF bit
TPnCE bit
FFFFH
0000H
Note
Note
Example when two capture registers are used (using overflow interrupt)
The TPnOVF0 and TPnOVF1 flags are set on the internal RAM by software.
Preliminary User’s Manual U17566EE1V2UM00
<1> Read the TPnCCR0 register (setting of the default value of the TIPn0
<2> Read the TPnCCR1 register (setting of the default value of the TIPn1
<3> An overflow occurs. Set the TPnOVF0 and TPnOVF1 flags to 1 in the
<4> Read the TPnCCR0 register.
<5> Read the TPnCCR1 register.
<6> Same as <3>
pin input).
pin input).
overflow interrupt servicing, and clear the overflow flag to 0.
Read the TPnOVF0 flag. If the TPnOVF0 flag is 1, clear it to 0.
Because the TPnOVF0 flag is 1, the pulse width can be calculated by
(10000H + D
Read the TPnOVF1 flag. If the TPnOVF1 flag is 1, clear it to 0 (the
TPnOVF0 flag is cleared in <4>, and the TPnOVF1 flag remains 1).
Because the TPnOVF1 flag is 1, the pulse width can be calculated by
(10000H + D
D
00
<1>
D
10
<2>
01
11
- D
- D
00
10
).
) (correct).
D
00
<3>
D
D
01
10
<4>
D
11
<5> <6>
D
01
D
11
Chapter 11
415

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