upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 531

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upd70f3422gj-gae-qs-ax

Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
Asynchronous Serial Interface (UARTA)
(2)
(3)
(4)
Odd parity
• During transmission
• During reception
0 parity
During transmission, the parity bit is always made 0, regardless of the transmit
data.
During reception, parity bit check is not performed. Therefore, no parity error
occurs, regardless of whether the parity bit is 0 or 1.
No parity
No parity bit is added to the transmit data.
Reception is performed assuming that there is no parity bit. No parity error
occurs since there is no parity bit.
Preliminary User’s Manual U17566EE1V2UM00
Opposite to even parity, the number of bits whose value is “1” among the
transmit data, including the parity bit, is controlled so that it is an odd
number. The parity bit values are as follows.
– Odd number of bits whose value is “1” among transmit data: 0
– Even number of bits whose value is “1” among transmit data: 1
The number of bits whose value is “1” among the receive data, including
the parity bit, is counted, and if it is an even number, a parity error is output.
Chapter 16
531

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