upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 455

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upd70f3422gj-gae-qs-ax

Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
16-bit Multi-Purpose Timer G (TMG)
count_up0(count_up1)
TM G0E (TM G1 E )
E NFG 0(E NFG1 )
TMGn0/TMGn1
Figure 13-5
INTTGnCCy
f
COUNTx
GCCny
TIGny
(c) Timing of starting capture trigger edge detection
A capture trigger input signal (TIGny) is synchronized in the noise eliminator
for internal use.
Edge detection starts when 1 count clock period (f
timer count operation starts. (This is because masking is performed to prevent
the initial TIGny level from being recognized as an edge by mistake.). The
timing chart for starting edge detection is shown below.
Basic settings (x = 0, 1 and y = 0 to 5):
Timing of starting capture trigger edge detection
Preliminary User’s Manual U17566EE1V2UM00
Invalid ed ge i nput
IEGny1
IEGny0
CSEx2
CSEx1
CSEx0
Bit
00 01H
E dge de tection s tart
00 02H
Value
0
1
0
1
1
00 03H
Remark
Count clock =
detection of both edges
00 04H
COUNT
00 05H
) has been input after
f
SPCLK0
00 06H
00 05 H
/4
Chapter 13
455

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