upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 835

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upd70f3422gj-gae-qs-ax

Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
LCD Bus Interface (LCD-I/F)
LBCTL0.BYF0
LBCTL0.TPF0
LBDATA0
DBD[7:0]
INTLCD
write buffer
SPCLK
DBWR
DBRD
internal
Figure 23-3
Sequence
23.3.2 LCD Bus I/F states during and after accesses
23.3.3 Writing to the LCD bus
Note
(1)
Write word to LBDATA0 register
Changing between input and output mode of the LCD bus pins DB[7:0] is done
automatically after they are configured as LCD Bus Interface pins via the port
configuration registers.
After the pins are configured as DB[7:0] they are operating in input mode.
During and after a bus read access DB[7:0] are operating in input mode and
retain this mode also after the read access is completed.
During and after a bus write access DB[7:0] are operating in output mode and
retain this mode also after the write access is completed.
This section shows typical sequences of writing words, halfwords and bytes to
the LCD bus.
Writing words
Writing a word transmits four bytes to the external LCD Controller/Driver.
Timing (mod80: LBTCTL0.IMD0 = 0): write word, LBWST0.WST0 = 5,
LBCYC0.CYC0 = 8, LBTCTL0.TCIS0 = 0
The timing diagrams are for functional explanation purposes only without any
relevance to the real hardware implementation.
1. A word of LCD data is written to the LBDATA0 register. The internal bus
2. The LBDATA0 register contents is copied to the write buffer. This clears
Preliminary User’s Manual U17566EE1V2UM00
transfer takes some clocks until the register is updated. Then the busy flag
LBCTL0.BYF0 is set until the data is copied to the write buffer.
LBCTL0.BYF0 and causes the interrupt output to become active for one
clock cycle. Transfer on the external bus interface starts with byte 0. The
“transfer in progress” flag LBCTL0.TPF0 is set to indicate that a transfer is
in progress.
Byte0
Byte1
Word
Word (consists of Byte0 … Byte3)
Byte2
Byte3
Chapter 23
835

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