upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 30
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Chapter 1
30
Serial Interfaces
Timers
Control Interfaces
SCKB0, SCKB1, SCKB2
SOB0, SOB1, SOB2
SIB0, SIB1, SIB2
Figure 1-1
VCMPO0, VCMPO1
TOG01 to TOG04
TOG21 to TOG24
TOG11 to TOG14
ANI12-ANI15
VCMP0, VCMP1
SM11 to SM14
SM21 to SM24
SM31 to SM34
SM41 to SM44
SM51 to SM54
SEG0 to SEG39
CRXD0, CRXD1
SM61 to SM64
COM0 to COM3
INTP0 to INTP6
RXDA0, RXDA1
CTXD0, CTXD1
TIG01 to TIG04
TIG21 to TIG24
TXDA0, TXDA1
TIG11 to TIG14
TOP00, TOP01
TOP10, TOP11
TOP20, TOP21
TOP30, TOP31
DBD0 to DBD7
TIP00, TIP01
TIP10, TIP11
TIP20, TIP21
TIP30, TIP31
SDA0, SDA1
SCL0, SCL1
SGO/SGOF
ANI0-ANI11
INTP7
1.4 Description
DBWR
SGOA
DBRD
AV
NMI
Note 1
Note 2
Note 2
Note 2
Note 3
REF
Figure 1-1 provides a functional block diagram of the V850E/DJ3
µPD70(F)3420, µPD70(F)3421, µPD70(F)3422, µPD70F3423, µPD70F3424,
µPD70F3425, µPD70F3426 microcontrollers.
V850E/DJ3 µPD70(F)3420, µPD70(F)3421, µPD70(F)3422, µPD70F3423,
µPD70F3424, µPD70F3425, µPD70F3426 block diagram
Preliminary User’s Manual U17566EE1V2UM00
TMP0 - TMP3
LCD Bus I/F
TMG0 - TMG2
Comparator
2 x UARTA
10-bit ADC
16-bit Timer
2 x Voltage
3/2 x CSIB
16-bit Timer
Controller
channels
LCD C/D
2 x CAN
Stepper
Interrupt
2 x I
Motor
16/12
C/D
SG0
2
Note 2
C
Note 3
Note 4
Note 2
Note 1
Note 1
BRG
BRG
Reset
TMZ0 - TMZ5
TMZ6 - TMZ9
16-bit Timer
16-bit Timer
16-bit Timer
16-bit Timer
Watchdog
Timer
WCT
WT
On-Chip Debug Unit
Standby Controller
System Controller
Note 5
POC
CPU Core
Watch
and
Watch Correction
Timer
NPB (NEC Peripheral Bus)
Power and Reset
Power supply
CPU
Correction
ROM
RAM
DMA
Ports
Note 8
Clock Generator
Spread Spectrum PLL
Sub oscillator
Ring oscillator
Main oscillator
Sub oscillator
Supervision
Main and
debug I/F
N-Wire
PLL
Control
Bus
Unit
Bridge
Bus
Flash
ROM
Note 6
Note 7
RESET
FOUT
XT1
XT2
X1
X2
FOUT
DMS
DRST
DDI
DDO
DCK
Auxiliary Functions
Clock Generator
Introduction
Memory
16 KB
1 MB
Flash
RAM
VSB
VSB
Note 10
Note 9
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