upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 689
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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CAN Controller (CAN)
After reset: 0000H R
CnERC
Note
Note
(9)
REPS
TEC7
15
7
CnERC - CANn module error counter register
The CnERC register indicates the count value of the transmission/reception
error counter.
The REC6 to REC0 bits of the reception error counter are invalid in the
reception error passive status (CnINFO.RECS1, CnINFO.RECS0 bit = 11B).
The TEC7 to TEC0 bits of the transmission error counter are invalid in the bus-
off status (CnINFO.BOFF bit = 1).
Preliminary User’s Manual U17566EE1V2UM00
REC6 to
TEC7 to
0 to 127
0 to 255
REPS
REC0
TEC0
0
1
REC6
TEC6
Address: CnERC <CnRBaseAddr> + 054H
14
6
Reception error passive status bit
The value of the reception error counter is not error passive (< 128)
The value of the reception error counter is in the error passive range
(≥ 128)
Reception error counter bit
Number of reception errors. These bits reflect the status of the
reception error counter. The number of errors is defined by the CAN
protocol.
Transmission error counter bit
Number of transmission errors. These bits reflect the status of
the transmission error counter. The number of errors is
defined by the CAN protocol.
REC5
TEC5
13
5
REC4
TEC4
12
4
REC3
TEC3
11
3
REC2
TEC2
10
2
REC1
TEC1
9
1
Chapter 19
REC0
TEC0
8
0
689
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