upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 926

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Index
IIC clock select registers
IIC control registers
IIC division clock select regis-
IIC flag registers (IICFn) 586
IIC function expansion registers
IIC shift registers (IICn) 592
IIC status registers (IICSn) 583
IICCLn 588
IICCn 579
IICFn 586
IICn 592
IICnIC 210
IICSn 583
IICX0n 589
Images in address space 115
IMRn 214
Initialization for access to exter-
In-service priority register
Instruction set 24
INT70IC 210
INT71IC 210
INTC (Interrupt Controller) 187
Internal peripheral function wait
Internal RAM area 120
Internal VFB flash and ROM
Internal VSB flash area 121
Internal VSB RAM area 121
Interrupt
Interrupt Controller 187
Interrupt mask registers
926
(ICC) 156
(IICCLn) 588
(IICCn) 579
ters (OCKSn) 589
(IICX0n) 589
nal devices 259
(ISPR) 216
control register (VSWC) 263
area 119
Maskable 203
Non-maskable 197
Processing (multiple
Response time 227
Debug trap 224
Edge and level detection
Exception trap 222
Periods in which interrupts
Software exception 220
interrupts) 225
configuration 218
are not
acknowledged 228
Preliminary User’s Manual U17566EE1V2UM00
Interrupt/exception source reg-
Interval measurement
INTMn 218
ISPR 216
L
LBCTL 828
LBCYC 829
LBDATA 831
LBDATA register
LBDATAR 833
LBS 272
LBWST 830
LCD
LCD Bus Interface 823
LCD Bus Interface control regis-
LCD Bus Interface cycle time
LCD Bus Interface data register
LCD Bus Interface data register
LCD Bus Interface wait state
LCD clock control register
LCD Controller/Driver 809
LCD display control register
LCD mode control register
LCDC0 813
LCDIC 210
LCDM0 815
IMRn 214
ister (ECR) 112
ter (LBCTL) 828
register (LBCYC) 829
(LBDATA) 831
(LBDATAR) 833
register (LBWST) 830
(LCDC0) 813
(SEGREG0k) 815
(LCDM0) 815
By restarting the
With free-running
Access types 825
Activation of
Panel addressing 811
Access modes 825
Interrupt generation 826
Registers 827
Timing 834
Common signals 816
Registers 812
Segment signals 817
counter 495
counter 494
segments 818
Link pointer 106
Local bus size configuration
M
Main oscillator clock monitor
Maskable interrupt status flag
Maskable interrupts 203
Maskable Interrupts Control
MCMPCnk 802
MCMPnk0 800
MCMPnk1 801
MCMPnkHW 801
MCNTCn0 799
MCNTCn1 799
MEMC (Memory
Memory 119
memory read delay configura-
N
Noise elimination
Non-maskable interrupts 197
Normal operation mode 115
N-Wire
N-Wire security disable control
O
OCDM 45
OCKSn 589
register (LBS) 272
register (CLMM) 163
(ID) 216
Register (xxIC) 210
Controller) 249
tion register (RDDLY) 276
register (RSUDIS) 880
Access configuration 282
Areas 119
Blocks 252
Controller registers 271
Pin input 93
Timer G 473
Code protection 339
Connection to
Controlling the
emulator 877
Enabling methods 884
Flash programming 237
ID code 879
Security disabling 880
Security function 879
emulator 886
interface 882