upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 433

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

16-bit Interval Timer Z (TMZ)
Initial Value
Initial Value
Address
Address
Access
Access
Note
(2)
(3)
TZnCNT0 - TMZn synchronized counter register
The TZnCNT0 register is the synchronized register that can be used to read
the present value of the 16-bit counter.
“Synchronized” means that the read access via the internal bus is
synchronized with the maximum counter clock (PCLK2). The synchronization
process may cause a delay, but the resulting value is reliable.
This register is read-only, in 16-bit units.
<base> of TMZn
0000
TZnCNT1 - TMZn non-synchronized counter register
The TZnCNT1 register is the non-synchronized register that can be used to
read the present value of the corresponding 16-bit counter.
“Non-synchronized” means that the read access via the internal bus is not
synchronized with the counter clock. It returns the instantaneous value
immediately, with the risk that this value is just being updated by the counter
and therefore in doubt.
This register is read-only, in 16-bit units.
<base> + 2
0000
The value read from this register can be incorrect, because the read access is
not synchronized with the counter clock.
Therefore, this register shall be read multiple times within one period of the
counter clock cycle.
If the difference between the first and the second value is not greater than one,
you can consider the second value to be correct. If the difference between the
two values is greater than one, you have to read the register a third time and
compare the third value with the second. Again, the difference must not be
greater than one.
If the read accesses do not happen within one period of the counter clock
cycle, the difference between the last two values will usually be greater than
one. In this case, you can only repeat the procedure or estimate the updated
counter value.
Preliminary User’s Manual U17566EE1V2UM00
15
15
H
H
14
14
. This register is cleared by any reset and when TZnCTL.TZCE = 0.
. This register is cleared by any reset and when TZnCTL.TZCE = 0.
13
13
H
12
12
Instantaneous counter value (non-synchronized)
11
11
Updated counter value (synchronized)
10
10
9
9
8
8
R
R
7
7
6
6
5
5
4
4
3
3
2
2
Chapter 12
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