upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 179
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Clock Generator
Stepper-C/D shut
Example
4.3.3 Power save mode activation
down
(1)
(2)
In the following procedures for securely entering a power save mode are
described.
In order to minimize power consumption during power save modes the Stepper
Motor Controller/Driver needs to be shut down in a special sequence. Refer to
“MCNTCn0, MCNTCn1 - Timer mode control registers” on page 799.
HALT mode
For entering the HALT mode proceed as follows:
1. Mask all interrupts which shall not have wake-up capability by
2. Unmask all interrupts which shall have wake-up capability by
3. Execute the “halt” instruction.
WATCH, Sub-WATCH, STOP and IDLE mode
For entering these power save mode proceed as follows:
1. In case maskable interrupts shall be used for wake-up unmask these
2. Mask all other interrupts, i.e.
3. It is recommended to disable interrupt acknowledgement by the “di”
4. Specify the desired power save mode in PSM.PSM[1:0].
5. Enable writing to the write-protected register PSC by writing to PRCMD.
6. Write to PSC for specifying permitted wake-up events and activate the
The following example shows how to initialize and enter a WATCH, Sub-
WATCH, STOP or IDLE power save mode.
First the desired power save mode is specified (WATCH mode in this example,
that means PSM.PSM[1:0] = 10
The PSC register is a write-protected register, and the PRCMD register is the
corresponding write-enable register. PRCMD has to be written immediately
before writing to PSC.
Preliminary User’s Manual U17566EE1V2UM00
xxIC.xxMK = 0 and discard all possibly pending interrupts by xxIC.xxIF = 0.
xxIC.xxMK = 1.
interrupts by IMRm.xxMK = 0 (refer to “IMR0 to IMR5 - Interrupt mask
registers” on page 214).
– none wake-up capable interrupts
– wake-up capable interrupts which shall not be used for wake-up
by IMRm.xxMK = 1. This prevents the power save mode entry procedure
from being interrupted by these interrupts.
instruction.
power save mode by setting PSC.STP to 1.
B
).
Chapter 4
179
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