upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 125
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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CPU System Functions
Example
Note
Start the Watchdog Timer
The following example shows how to write to the write protected register
WDTM. The example starts the Watchdog Timer.
do {
} while (_WPRERR != 0)
1.
2.
Since any action between writing to a write enable register and writing to a
protected register destroys this sequence, the effects of interrupts and DMA
transfers have to be considered:
• Interrupts:
• DMA:
The above examples checks WPHS.WPRERR for that purposes and repeats
the sequence until the write to WDTM was successful.
Preliminary User’s Manual U17566EE1V2UM00
In order to prevent any maskable interrupt to be acknowledged between the
two write instructions in question, shield this sequence by DI - EI (disable
interrupt - enable interrupt).
However, any non-maskable interrupt can still be acknowledged.
In the above example, DMA transfers can still take place. They may destroy
the sequence.
If appropriate, you may disable DMA transfers in advance. Otherwise you
must check whether writing to the protected register was successful. To do
so, check the status via the status register, if available, or by reading back
the protected register.
Make sure that the compiler generates two consecutive assembler “store”
instructions to WCMD and WDTM from the associated C statements.
Special care must be taken when writing to registers PCS and PRCMD.
Please refer to “Clock Generator“ on page 129 for details.
_WPRERR = 0;
DI();
WCMD = 0x5A;
WDTM = 0x80;
EI();
Chapter 3
125
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