upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 516

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 16
516
Bit position
2
1
0
Table 16-5
Bit name
UAnOVE
UAnPE
UAnFE
UAnSTR register contents (2/2)
Preliminary User’s Manual U17566EE1V2UM00
Function
Parity error flag:
• The operation of the UAnPE bit is controlled by the settings of the
• The UAnPE bit can be read and written, but it can only be cleared by writing 0
Framing error flag
• Only the first bit of the receive data stop bits is checked, regardless of the
• The UAnFE bit can be both read and written, but it can only be cleared by
Overrun error flag
• When an overrun error occurs, the data is discarded without the next receive
• The UAnOVE bit can be both read and written, but it can only be cleared by
0: – When the UAnPWR bit = 0 or the UAnRXE bit = 0 has been set.
1: When parity of data and parity bit do not match during reception.
0: – When the UAnPWR bit = 0 or the UAnRXE bit = 0 has been set
1: When no stop bit is detected during reception
0: – When the UAnPWR bit = 0 or the UAnRXE bit = 0 has been set.
1: When receive data has been set to the UAnRXB register and the next receive
UAnCTL0.UAnPS1 and UAnCTL0.UAnPS0 bits.
to it, and it cannot be set by writing 1 to it. When 1 is written to this bit, the
value is retained.
value of the UAnCTL0.UAnSL bit.
writing 0 to it, and it cannot be set by writing 1 to it. When 1 is written to this
bit, the value is retained.
data being written to the receive buffer.
writing 0 to it. When 1 is written to this bit, the value is retained.
– When 0 has been written
– When 0 has been written
– When 0 has been written
operation is completed before that receive data has been read
Asynchronous Serial Interface (UARTA)