upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 445

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

16-bit Multi-Purpose Timer G (TMG)
Bit position
15, 11, 7, 3
14, 10, 6, 2
13, 9, 5, 1
Initial Value
Table 13-6
Address
Caution
Access
SWFGnm
CCSGnm
Bit name
ALVGnm
(3)
OCTLGn - Timer Gn output control register
This register controls the timer output from the TOGnm pin and the capture or
compare modus for the GCCnm register.
This register can be read/written in 16-bit, 8-bit or 1-bit units.
The low byte OCTLGn.bit[7:0] is accessible separately under the name
OCTLGnL, the high byte OCTLGn.bit[15:8] under the name OCTLGnH.
OCTLGn, OCTLGnL:
OCTLGnH:
4444
1.
2.
OCTLGn register contents
Preliminary User’s Manual U17566EE1V2UM00
SWFGn4
SWFGn2
When the POWERn bit is set, the rewriting of CCSGnm is prohibited
When the POWERn bit and TMGn0E bit (TMGn1E bit) are set at the same
time, the rewriting of the ALVGnm bits is prohibited.
R/W
R/W
Function
Fixes the TOGnm pin output level according to the setting of ALVGnm bit.
Specifies the active level of the TGOnm pin output.
Caution:
Specifies Capture/Compare mode selection:
Caution:
15
7
0: disable TOGnm to inactive level
1: enable TOGnm
0: Active level is 0
1: Active level is 1
0: Capture mode:
1: Compare mode:
H
. This register is cleared by any reset.
if external edge is detected the INTCCGnm interrupt occurs, the
corresponding counter value is written to GCCnm
if GCCnm matches with corresponding timebase the INTCCGnm interrupt
occurs, if SWFGm is set the PWM output mode is set
ALVGn4
ALVGn2
R/W
R/W
14
Don’t write this bit, before ENFGn0 or ENFGn1 of TMGSTn is 0, so first
clear TMGn0E or TMGn1E bit of the TMGMn register and check
ENFGn0 or ENFGn1 bit before writing.
Don’t write this bit, before POWERn bit of TMGMnH is 0.
6
CCSGn4
CCSGn2
R/W
R/W
13
<base> + 4
<base> + 5
5
R/W
R/W
12
4
0
0
H
H
SWFGn3
SWFGn1
R/W
R/W
11
3
ALVGn3
ALVGn1
R/W
R/W
10
2
CCSGn3
CCSGn1
R/W
R/W
9
1
Chapter 13
R/W
R/W
8
0
0
0
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