upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 612
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Chapter 18
612
18.7.4 Operation without communication
18.7.5 Arbitration loss operation (operation as slave after
(1)
(1)
<1> When WTIMn bit = 0
<2> When WTIMn bit = 1
Start ~ Code ~ Data ~ Data ~ Stop
arbitration loss)
When arbitration loss occurs during transmission of slave address data
Preliminary User’s Manual U17566EE1V2UM00
ST
ST
▲1: IICSn register = 0101X110B (Example: When ALDn bit is read during interrupt servicing)
▲2: IICSn register = 0001X000B
▲3: IICSn register = 0001X000B
Δ 4: IICSn register = 00000001B
▲1: IICSn register = 0101X110B (Example: When ALDn bit is read during interrupt servicing)
▲2: IICSn register = 0001X100B
▲3: IICSn register = 0001XX00B
Δ 4: IICSn register = 00000001B
Remarks 1. ▲: Always generated
Remarks 1. ▲: Always generated
ST
Δ 1: IICSn register = 00000001B
AD6 to AD0
AD6 to AD0
Remarks 1. Δ: Generated only when SPIEn bit = 1
AD6 to AD0
2. n = 0 to 2
2. n = 0 to 2
Δ: Generated only when SPIEn bit = 1
X: don’t care
Δ: Generated only when SPIEn bit = 1
X: don’t care
2. n = 0 to 2
RW
RW
RW
AK
AK
▲1
▲1
AK
D7 to D0
D7 to D0
D7 to D0
▲2
AK
AK
▲2
AK
D7 to D0
D7 to D0
D7 to D0
▲3
AK
AK
I
2
▲3
AK
C Bus (IIC)
SP
SP
Δ4
Δ4
SP
Δ1
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