upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 675

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upd70f3422gj-gae-qs-ax

Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
CAN Controller (CAN)
MBON
After reset: 0000H
0
1
CnGMCTRL
Caution
Bit enabling access to message buffer register, transmit/receive history registers
Write access and read access to the message buffer register and the transmit/receive
history list registers is disabled.
Write access and read access to the message buffer register and the transmit/receive
history list registers is enabled.
19.6 Control Registers
Note
(1)
MBON
15
7
0
CnGMCTRL - CANn global control register
The CnGMCTRL register is used to control the operation of the CAN module.
(a) Read
1.
2.
MBON bit is cleared (to 0) when the CAN module enters CAN sleep mode/
CAN stop mode or GOM bit is cleared (to 0).
MBON bit is set (to 1) when the CAN sleep mode/the CAN stop mode is
released or GOM bit is set (to 1).
Preliminary User’s Manual U17566EE1V2UM00
R/W
While the MBON bit is cleared (to 0), software access to the message
buffers (CnMDATA0m, CnMDATA1m, CnMDATA01m, CnMDATA2m,
CnMDATA3m, CnMDATA23m, CnMDATA4m, CnMDATA5m, CnMDATA45m,
CnMDATA6m, CnMDATA7m, CnMDATA67m, CnMDLCm, CnMCONFm,
CnMIDLm, CnMIDHm, and CnMCTRLm), or registers related to transmit
history or receive history (CnLOPT, CnTGPT, CnLIPT, and CnRGPT) is
disabled.
This bit is read-only. Even if 1 is written to the MBON bit while it is 0, the
value of the MBON bit does not change, and access to the message buffer
registers, or registers related to transmit history or receive history remains
disabled.
Address: <CnRBaseAddr> + 000
14
0
6
0
13
0
5
0
12
0
4
0
H
11
0
3
0
10
0
2
0
EFSD
9
0
1
Chapter 19
GOM
8
0
0
675

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