upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 868
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
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Chapter 26
868
RESPOC and
Initial Value
Table 26-4
RESEXT
Address
Access
Note
(1)
RESSTAT - Reset source flag register
The 8-bit RESSTAT register contains information about which type of resets
occurred since the last Power-On-Clear or external RESET or after the last
software clear of the register.
Each following reset condition sets the corresponding flag in the register. For
example, if a Power-On-Clear reset is finished and then a Watchdog Timer
reset occurs, the RESSTAT reads xxx1 0001
The register can be read/written in 8-bit units.
FFFF FF20
Power-On-Clear reset sets this register to 01
External RESET sets this register to 02
a)
RESSTAT register contents
If clearing this register by writing and flag setting (occurrence of reset) conflict,
flag setting takes precedence.
Both Power-On-Clear and external RESET set RESSTAT to different initial
states.
• Power-On-Clear reset sets RESSTAT = 01
• External RESET sets RESSTAT = 02
Special caution is required if both reset events are active concurrently:
• If the Power-On-Clear reset is longer active than the external RESET:
• If the external RESET is longer active than the Power-On-Clear reset:
Preliminary User’s Manual U17566EE1V2UM00
Bit position
RESSTAT = 01
the Power-On-Clear reset.
RESSTAT = 02
external RESET.
X
R
7
Any write clears this register, independent of the data written.
4
3
2
1
0
H
R
6
X
H
H
RESWDT
Bit name
RESCM2
RESCM1
RESPOC
RESEXT
. That means RESSTAT indicates only the occurrence of
.That means RESSTAT indicates only the occurrence of the
R
X
5
a
RESWDT RESCM2 RESCM1 RESEXT RESPOC
Function
Reset by Watchdog Timer
Reset by Clock Monitor of sub oscillator
Reset by Clock Monitor of main oscillator
External RESET
Reset at Power-On-Clear
0: Not generated.
1: Generated.
0: Not generated.
1: Generated.
0: Not generated.
1: Generated.
0: Not generated.
1: Generated.
0: Not generated.
1: Generated.
R/W
4
a
H
H
.
R/W
3
B
H
H
a
.
.
R/W
2
a
R/W
1
a
R/W
Reset
0
a
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