upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 817
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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LCD Controller/Driver (LCD-C/D)
Figure 22-5
(2)
Segment Signals
Segment signals correspond to the contents of the 40 LCD display control
registers SEGREG0k. Bits 0 to 3 of these registers are read in synchronization
with the common signals COM0 to COM3, this means bit 0 is read in
synchronization with common signal COM0 and so on.
• If the value of the bit is 1 while the common signal is at selection level, the
• If the value of the bit is 0 while the common signal is at selection level, the
Figure 22-5 shows the selection and non-selection level of segment signals.
Selection level and non-selection level of segment signals
T = duty cycle time.
The table below shows the relation of the bits in registers SEGREG0k (k = 0 to
39) with common signals COM0 to COM3 and segment output signals SEG00
to SEG39.
Each of the bits 0 to 4 represents the status of one LCD segment. Setting the
bit to 1 will make the LCD segment visible.
For example, setting bit SEGREG02[3] to 1 will make the LCD segment visible,
that is controlled by the signal pair SEG2 and COM3.
Preliminary User’s Manual U17566EE1V2UM00
SEGREG00
0
SEGREG00
1
SEGREG00
2
SEGREG03
8
SEGREG03
9
corresponding segment signal is set to selection level.
corresponding segment signal is set to non-selection level.
•
•
•
7
Segment signal
6
5
4
T
•
•
•
COM3 COM2 COM1 COM0
3
↑
T
↑
2
V
V
V
V
LC0
LC1
LC2
SS1
1
↑
V
LCD
0
↑
→
→
→
→
→
Chapter 22
SEG38
SEG39
SEG0
SEG1
SEG2
•
•
•
817
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