upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 166

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 4
166
Bit position
0
Initial Value
Table 4-23
Address
Caution
Access
Bit name
Note
CMRT
(5)
CLMCS - Sub oscillator clock monitor control register
The 8-bit CLMCS register is used to start the monitor of the sub oscillator
clock.
This register can be read/written in 8-bit or 1-bit units.
FFFF F71A
00
CLMCS register contents
Setting CLMCS.CMRT to 1 generates a trigger to activate the sub oscillator
clock monitor.
1.
2.
Starting the sub oscillator clock monitor requires a special procedure. Refer to
“Operation of the Clock Monitors” on page 185.
Preliminary User’s Manual U17566EE1V2UM00
H
. The register is initialized by any reset.
R
The sub oscillator clock monitor can only be started, if it has been enabled
by setting CLMS.CLMES to 1.
Make sure that the sub oscillator stabilization time has elapsed before
starting the clock monitor.
7
0
Function
Sub oscillator clock monitor start:
0: Clock monitor
1: Clock monitor for sub oscillator on.
H
.
R
6
0
for
R
5
0
sub oscillator off.
R
4
0
R
3
0
R
2
0
Clock Generator
R
1
0
CMRT
R/W
0