upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 430

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 12
430
PCLK9 (31.250 KHz)
PCLK7 (125 KHz)
PCLK5 (0.5 MHz)
PCLK4 (1 MHz)
PCLK2 (4 MHz)
Figure 12-1
12.1.1 Description
12.1.2 Principle of operation
TZCKS2
TZnCTL
TZCKS1 TZCKS0
The TMZ has no external connections. It is built up as illustrated in the
following figure.
Block diagram of Timer Z (TMZn)
The control register TZnCTL allows you to choose the clock and to enable the
timer. The latter is done by setting TZnCTL.TZCE to 1.
As soon as the timer is enabled, it is possible to write a start value to the reload
register TZnR.
When it is enabled, the counter starts as soon as a non-zero value is written to
the reload register TZnR and copied to the reload buffer.
When the counter reaches zero, it generates an INTTZnUV interrupt, reloads
its start value from the reload buffer, and continues counting.
Two read-only registers (TZnCNT0 and TZnCNT1) provide the updated
counter value. For details about these registers please refer to “TZnCNT0 -
TMZn synchronized counter register“ on page 433 and “TZnCNT1 - TMZn
non-synchronized counter register“ on page 433.
Preliminary User’s Manual U17566EE1V2UM00
TZnCTL.TZCE
TZnCNT1
Internal bus
TZnCNT0
16-bit down counter
TZnCNT
Reload buffer
TZnR
16-bit Interval Timer Z (TMZ)
INTTZnUV