upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 153

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Clock Generator
Bit position
Write protection
2, 0
Table 4-14
Bit name
WTSOS,
WTSEL0
Note
TCC register contents (2/2)
Only POC and external RESET can clear the TCC register. Only one write
access to TCC is allowed after reset release. Once the TCC has been written,
it ignores new write accesses until the next POC or external RESET is issued.
Write protection of this register is achieved in two ways:
• The register can be written only once after Power-On-Clear reset or external
• The register is protected by a special sequence via the PHCMD register.
If a write is correctly performed by the special sequence after the register has
already once been written successfully PHS.PRERR remains 0, though the
write has been ignored.
PHS.PRERR shows violations of the special sequence only. It does not reflect
attempts to write the register more than once after reset.
Preliminary User’s Manual U17566EE1V2UM00
RESET.
A fail of a write by the special sequence is reflected by PHS.PRERR = 1.
Function
Clock source for Watch Timer and LCD controller:
By default, the sub oscillator is disabled in STOP mode (see bit WCC.SOSTP). If
WCC.SOSTP is 1, choose main or ring oscillator before entering STOP mode.
Caution:
WTSOS
0
1
0
1
Do not specify the sub oscillator, if the sub oscillator is not enabled or
not connected.
WTSEL0
0
0
1
1
Clock source
Ring oscillator
Sub oscillator
Main oscillator
Setting prohibited
Chapter 4
153