upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 353
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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16-bit Timer/Event Counter P (TMP)
Initial Value
Address
Access
(7)
TPnCCR0 - TMPn capture/compare register 0
The TPnCCR0 register can be used as a capture register or a compare
register depending on the mode.
This register can be used as a capture register or a compare register only in
the free-running timer mode, depending on the setting of the
TPnOPT0.TPnCCS0 bit. In the pulse width measurement mode, the TPnCCR0
register can be used only as a capture register. In any other mode, this register
can be used only as a compare register.
The TPnCCR0 register can be read or written during operation.
This register can be read/written in 16-bit units.
<base> + 6
0000
(a) Function as compare register
Preliminary User’s Manual U17566EE1V2UM00
15
The TPnCCR0 register can be rewritten even when the TPnCTL0.TPnCE
bit = 1.
The set value of the TPnCCR0 register is transferred to the CCR0 buffer
register. When the value of the 16-bit counter matches the value of the
CCR0 buffer register, a compare match interrupt request signal
(INTTPnCC0) is generated. If TOPn0 pin output is enabled at this time, the
output of the TOPn0 pin is inverted.
When the TPnCCR0 register is used as a cycle register in the interval timer
mode, external event count mode, external trigger pulse output mode, one-
shot pulse output mode, or PWM output mode, the value of the 16-bit
counter is cleared (0000H) if its count value matches the value of the
CCR0 buffer register.
H
14
. This register is initialized by any reset.
13
H
12
11
10
9
CCR0 value
8
R/W
7
6
5
4
3
2
Chapter 11
1
353
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