upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 442
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Chapter 13
442
position
13 to 8
Bit
15
14
Initial Value
Table 13-4
Address
CSEnx[2:0]
Bit name
POWERn
Access
OLDEn
(1)
TMGMn - Timer Gn mode register
This register can be read/written in 16-bit, 8-bit or 1-bit units.
The low byte TMGMn.bit[7:0] is accessible separately under the name
TMGMnL, the high byte TMGMn.bit[15:8] under the name TMGMnH.
TMGMn, TMGMnL:
TMGMnH:
0000
TMGMn register contents (1/2)
Preliminary User’s Manual U17566EE1V2UM00
Function
Timer Gn Operation control.
Note: At least 7 peripheral clocks (
Set Output Delay Operation.
Caution:
Note: The delay operation is used for EMI counter measures.
Selects internal count clock of TMG
Caution:
POWERn
CCSGn5
0: operation Stop
1: operation enable
0: Don’t perform output delay operation
1: Set output delay to n count-clocks
R/W
R/W
15
7
CSEnx2
H
the capture registers and TMGSTn register are cleared
the TOGnm pins are inactive all the time
. This register is cleared by any reset.
0
0
0
0
1
1
1
1
When the POWERn bit is set, the rewriting of this bit is prohibited!
Simultaneously writing with the POWERn bit is allowed.
When the POWERn bit is set, the rewriting of this bits are prohibited!
Simultaneously writing with the POWERn bit is allowed.
CCSGn0
OLDEn
R/W
R/W
14
6
CSEnx1
0
0
1
1
0
0
1
1
CSEn12
R/W
R/W
13
<base> + 1
<base>
5
0
CSEnx0 Count clock
0
1
0
1
0
1
0
1
CSEn11
R/W
R/W
12
f
4
0
SPCLK0
f
f
f
f
f
f
f
f
H
SPCLK0
SPCLK0
SPCLK0
SPCLK0
SPCLK0
SPCLK0
SPCLK0
SPCLK0
16-bit Multi-Purpose Timer G (TMG)
CLRGn1
CSEn10
) are needed to start the timer function
R/W
R/W
/2
/4
/8
/16
/32
/64
/128
11
3
TMGn1E
CSE002
R/W
R/W
10
2
CLRGn0
CSEn01
R/W
R/W
9
1
TMGn0E
CSEn00
R/W
R/W
8
0
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