upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 202
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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Chapter 5
202
Bit position
PSW
7
31
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NP EP
5.2.3 Non-maskable interrupt status flag (NP)
5.2.4 NMI0 control
Bit name
NP
The NP flag is a status flag that indicates that non-maskable interrupt (NMI)
processing is under execution.
This flag is set when an NMI interrupt has been acknowledged, and masks all
interrupt requests and exceptions to prohibit multiple interrupts from being
acknowledged.
The NMI0 can be configured to generate an NMI upon a rising, falling or both
edges at the NMI pin. To enable respectively disable the NMI0 and to configure
the edge refer to “Edge and Level Detection Configuration“ on page 218.
Preliminary User’s Manual U17566EE1V2UM00
Function
Indicates whether NMI interrupt processing is in progress.
0: No NMI interrupt processing
1: NMI interrupt currently being processed
8
7
6
ID
5
SAT CY OV
Interrupt Controller (INTC)
4
3
2
1
S
0
Z
Initial value
00000020H
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