upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 171

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upd70f3422gj-gae-qs-ax

Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
Clock Generator
Table 4-26
(3)
WATCH mode
In WATCH mode, the clock supply for the CPU system and the majority of
peripherals is stopped.
The main oscillator continues operation. PLL and SSCG are stopped. By
default, ring oscillator and sub oscillator operation is not affected. For
exceptions see “Ring and sub oscillator operation” on page 184.
Clock Generator status in WATCH mode
The WATCH mode can be released by
• the unmasked maskable interrupts INTPn, INTCnWUP, INTWTnUV,
• NMI0, NMIWDT
• RESET, RESPOC, RESWDT, RESCMM, RESCMS
On WATCH mode release, the CPU starts operation using the following
clocks:
• if PSM.OSCDIS = 1: sub clock source selected before WATCH mode was
• if PSM.OSCDIS = 0: main oscillator
If the ring oscillator was stopped before entering the WATCH mode, the
oscillation stabilization time for the ring oscillator is ensured by hardware after
WATCH mode release.
PLL and SSCG remain stopped after WATCH release.
Peripheral clock supply is switched to main oscillator supply, if
PSM.OSCDIS = 0, otherwise the ring oscillator is used for peripheral clocks.
Preliminary User’s Manual U17566EE1V2UM00
Item
Main oscillator
Sub oscillator
Ring oscillator
SSCG
PLL
VBCLK (CPU system)
IICLK
PCLK0, PCLK1
PCLK2…PCLK15
SPCLK0, SPCLK1
SPCLK2…SPCLK15
FOUTCLK
WTCLK / LCDCLK
WDTCLK
WCTCLK
INTTM01, INTVCn, INTCBnR
entered, that means, either ring oscillator or sub oscillator (defined by
PCC.SOSCP)
Status
unchanged/stopped
operates
operates/stopped
stopped
stopped
stopped
stopped
stopped
stopped
stopped
stopped
unchanged/stopped
unchanged/stopped
unchanged/stopped
unchanged/stopped
Remarks
Stopped if PSM.OSCDIS = 1
Stopped if WCC.ROSTP = 1
Stopped, if the selected clock
source stops
Stopped, if the selected clock
source stops
Stopped, if the selected clock
source stops
Depends on clock selector
PSM.CMODE
Chapter 4
171

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