upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 625
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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I
2
C Bus (IIC)
Figure 18-14
Address transfer
completion
(restart)
No
Master operation flowchart (1)
Preliminary User’s Manual U17566EE1V2UM00
Yes (transmit)
IICEn = SPIEn = WTIMn
Generate stop condition
Start IICn write transfer
Start IICn write transfer
Select transfer clock
Transfer completed?
Data processing
IICCLn
IICCn
INTIICn = 1?
MSTSn = 1?
INTIICn = 1?
ACKDn = 1?
INTIICn = 1?
ACKDn = 1?
= SPTn = 1
TRCn = 1?
SPTn = 1
STTn = 1
START
Wait
End
←
←
Yes (start condition generation)
Yes (stop condition detection)
Yes
Yes
Yes
Yes
No
××H
××H
Yes
No
No
No
No
No (receive)
No
Wait time is secured by
software (see Table 17-6)
(no slave with matching address)
Generate stop condition
Transfer completed?
Data processing
Start reception
INTIICn = 1?
WRELn = 1
ACKEn = 0
WTIMn = 0
ACKEn = 1
End
Yes
Yes
INTIICn = 1?
Stop condition detection,
start condition generation by
communication reservation
No
No
Communication reservation
Yes
No
Chapter 18
625
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