upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 456

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 13
456
INTTGnOV0
Figure 13-6
INTTGnCC1
TM G n0
ENFG0
GCCn1
(2)
Ma tch
Compare operation (free run)
Basic settings (m = 1 to 4):
(a) Example: Interval timer (free run)
Setting method interval timer:
(1)
(2)
(3)
(4)
Compare Operation:
(1)
(2)
Timing of compare mode (free run)
Data N is set in GCCn1, and the counter TMGn0 is selected.
Preliminary User’s Manual U17566EE1V2UM00
An usable compare register is one of GCCn1 to GCCn4, and the
corresponding counter (TMGn0 or TMGn1) must be selected with the
TBGnm bit.
Select a count clock cycle with the CSE12 to CSE10 bits (TMGn1
register) or CSE02 to CSE00 bits (TMGn0 register).
Write data to GCCnm.
Start timer operation by setting POWERn and TMGn0E (or TMGn1E).
When the value of the counter matches the value of GCCnm (m = 0 to 4),
a match interrupt (INTCCGnm) is output.
When the counter overflows, an overflow interrupt (INTTMGn0/
INTTMGn1) is generated.
FFFFH
SWFGnm
CCSGnm
CCSGn0
CCSGn5
TBGnm
Bit
FFFFH
N
Value
X
0
0
0
1
16-bit Multi-Purpose Timer G (TMG)
FFFFH
Remark
free run mode
disable TOGnm
Compare mode for
GCCnm
assign counter
for GCCnm
0: TMGn0
1: TMGn1