upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 714

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upd70f3422gj-gae-qs-ax

Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
Chapter 19
714
Priority
1 (high)
2
3
4
5 (low)
19.10.1 Message reception
19.10 Message Reception
19.9.1 Resetting error counter CNERC of CAN module
If it is necessary to reset the CnERC and CnINFO registers when re-
initialization or forced recovery from the bus-off status is made, set the
CnCTRL.CCERC bit to 1 in the initialization mode. When this bit is set to 1, the
CnERC and CnINFO registers are cleared to their default values.
In all the operation modes, when a message is received, a message buffer that
is to store the message is searched from all the message buffers satisfying the
following conditions.
• Used as a message buffer
• Set as a receive message buffer
• Ready for reception
When two or more message buffers of the CAN module receive a message,
the message is stored according to the priority explained below. The message
is always stored in the message buffer with the highest priority, not in a
message buffer with a low priority. For example, when an unmasked receive
message buffer and a receive message buffer linked to mask 1 have the same
ID, the message is always stored in the unmasked receive message buffer
even if this unmasked receive buffer has already received a message earlier.
Preliminary User’s Manual U17566EE1V2UM00
Storing Condition If Same ID Is Set
Unmasked message buffer
Message buffer linked to mask 1
Message buffer linked to mask 2
Message buffer linked to mask 3
Message buffer linked to mask 4
(CnMCONFm.MA0 bit is set to 1.)
(CnMCONFm.MT2 to CnMCONFm.MT0 bits are set to 001B, 010B, 011B,
100B, or 101B.)
(CnMCTRLm.RDY bit is set to 1.)
DN bit = 0
DN bit = 1 and OWS bit = 1
DN bit = 0
DN bit = 1 and OWS bit = 1
DN bit = 0
DN bit = 1 and OWS bit = 1
DN bit = 0
DN bit = 1 and OWS bit = 1
DN bit = 0
DN bit = 1 and OWS bit = 1
CAN Controller (CAN)

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