upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 348

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 11
348
Bit position
2 to 0
6
5
Initial Value
Table 11-4
Address
Caution
Access
TPnMD[2:0]
Bit name
TPnEEE
TPnEST
(2)
TPnCTL1 - TMPn control register 1
The TPnCTL1 register is an 8-bit register that controls the operation of TMPn.
This register can be read/written in 8-bit or 1-bit units.
<base> + 1
00
TPnCTL1 register contents
1.
2.
Preliminary User’s Manual U17566EE1V2UM00
H
The TPnEST bit is valid only in the external trigger pulse output mode or
one-shot pulse output mode. In any other mode, writing 1 to this bit is
ignored.
External event count input is selected in the external event count mode
regardless of the value of the TPnEEE bit.
R/W
. This register is initialized by any reset.
7
0
Function
Software trigger control.
• In one-shot pulse output mode:
• In external trigger pulse output mode:
Count clock selection:
The TPnEEE bit selects whether counting is performed with the internal count
clock or the valid edge of the external event count input.
Timer mode selection:
0: –
1: Generate a valid signal for external trigger input.
0: Disable operation with external event count input.
1: Enable operation with external event count input.
A one-shot pulse is output with writing 1 to the TPnEST bit as the trigger.
A PWM waveform is output with writing 1 to the TPnEST bit as the trigger.
TPnMD2
(Perform counting with the count clock selected by the TPnCTL0.TPnCK0 to
TPnCK2 bits.)
(Perform counting at the valid edge of the external event count input signal.)
TPnEST
H
0
0
0
0
1
1
1
1
R/W
6
TPnEEE
TPnMD1
R/W
5
0
0
1
1
0
0
1
1
R/W
TPnMD0
4
0
0
1
0
1
0
1
0
1
16-bit Timer/Event Counter P (TMP)
R/W
3
0
Timer mode
Interval timer
External event count
External trigger pulse output
One-shot pulse output
PWM output
Free-runnning timer
Pulse width measurement
Setting prohibited
TPnMD2
R/W
2
TPnMD1
R/W
1
TPnMD0
R/W
0