upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 576

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 18
576
Master CPU1
Figure 18-2
Slave CPU1
Address 1
(1)
(2)
(3)
(4)
A serial bus configuration example is shown below.
Serial bus configuration example using I
I
IIC shift register n (IICn)
The IICn register converts 8-bit serial data into 8-bit parallel data and vice
versa, and can be used for both transmission and reception.
Write and read operations to the IICn register are used to control the actual
transmit and receive operations.
Slave address register n (SVAn)
The SVAn register sets local addresses when in slave mode.
SO latch
The SO latch is used to retain the output level of the SDAn pin.
Wakeup controller
This circuit generates an interrupt request when the address received by this
register matches the address value set to the SVAn register or when an
extension code is received.
Preliminary User’s Manual U17566EE1V2UM00
2
C0n includes the following hardware.
SDA
SCL
Serial data bus
Serial clock
+V
DD
+V
DD
2
C bus
SDA
SCL
SDA
SCL
SDA
SCL
SDA
SCL
Master CPU2
Slave CPU2
Address 2
Slave CPU3
Address 3
Slave IC
Address 4
Slave IC
Address N
I
2
C Bus (IIC)