upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 579

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

I
2
Condition for clearing (IICEn = 0)
• Cleared by instruction
• After reset
The stand-by mode following exit from communications remains in effect until the following communication entry
conditions are met.
• After a stop condition is detected, restart is in master mode.
• An address match occurs or an extension code is received after the start condition.
Condition for clearing (LRELn = 0)
• Automatically cleared after execution
• After reset
Condition for clearing (WRELn = 0)
• Automatically cleared after execution
• After reset
C Bus (IIC)
WRELn
LRELn
IICEn
0
1
0
1
0
1
Initial Value
Address
Operation stopped. IICSn register reset
Operation enabled.
Normal operation
This exits from the current communication operation and sets stand-by mode. This setting is
automatically cleared after being executed. Its uses include cases in which a locally irrelevant
extension code has been received.
The SCLn and SDAn lines are set to high impedance.
The STTn and SPTn bits and the MSTSn, EXCn, COIn, TRCn, ACKDn, and STDn bits of the IICSn
register are cleared.
Wait not cancelled
Wait cancelled. This setting is automatically cleared after wait is cancelled.
Access
(1)
IICCn - IICn control registers
The IICCn registers enable/stop I
other I
This register can be read/written in 8-bit or 1-bit units.
<base> + 2
00
Preliminary User’s Manual U17566EE1V2UM00
IICEn
H
R/W
. This register is cleared by any reset.
7
2
Cn operations.
Note 2
Note 2
Specification of I
H
LRELn
R/W
6
Exit from communications
WRELn
Wait cancellation control
R/W
5
Note 1
2
Cn operation enable/disable
Condition for setting (IICEn = 1)
• Set by instruction
Condition for setting (LRELn = 1)
• Set by instruction
Condition for setting (WRELn = 1)
• Set by instruction
. Internal operation stopped.
SPIEn
R/W
2
4
Cn operations, set the wait timing, and set
WTIMn
R/W
3
ACKEn
R/W
2
STTn
R/W
1
Chapter 18
SPTn
R/W
0
579