upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 504

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 15
504
Bit Position
7
6
5
3
Initial Value
Table 15-5
Address
Access
WDTMODE
LOCK_TM
LOCK_CS
Bit Name
Note
RUN
(2)
WDTM - WDT mode register
This register sets the operating mode of the Watchdog Timer and enables or
disables counting.
When the Watchdog Timer is running and shall not overflow, it is necessary to
write to WDTM before the specified running time has elapsed.
This register can be read/written in 8-bit units. Once the Watchdog Timer is
started (WDTM.RUN = 1), the contents of this register cannot be changed.
Writing to this register is protected by a special sequence of instructions.
Please refer to “WCMD - WDT command protection register“ on page 505 for
details.
<base> + 4
00
unlocks the registers. The register remains unchanged after SYSRES.
WDTM register contents
After SYSRESWDT, the timer is always stopped and initialized. You can
change the register contents by writing.
When the timer is running, you can also write to this register, but the write
operation does not change the register contents (WDTM.LOCK_TM = 1).
When the timer is running, the write access resets the counter.
To write to the WDTM register:
1. Write one byte to the WCMD register (the value is ignored).
2. Immediately after that, write one byte to the WDTM register (the value is
With this procedure, restarting the counter is always possible, regardless of the
register’s write protection status.
Preliminary User’s Manual U17566EE1V2UM00
RUN
R/W
H
. This register is cleared by SYSRESWDT. This stops the timer and
7
ignored).
WDCS register protection status:
Function
Watchdog Timer running:
WDTM register protection status:
Watchdog Timer operation mode:
0: Timer stopped
1: Timer running (with the time interval specified in register WDCS)
0: Register unlocked
1: Register locked (write-protected)
0: Register unlocked
1: Register locked (write-protected)
0: Mode 0: Generates the non-maskable interrupt NMIWDT upon overflow
1: Mode 1: Generates RESWDT upon overflow
LOCK_TM
H
R
6
LOCK_CS
R
5
R
4
0
WDTMODE
R/W
3
R
2
0
Watchdog Timer (WDT)
R
1
0
R
0
0