upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 630

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 18
630
Figure 18-18
Note
Interrupt servicing completed
Interrupt servicing completed
Clear communication mode
Termination processing
INTIICn generated
During an INTIICn interrupt, the status is confirmed and the following steps are
executed.
<1> When a stop condition is detected, communication is terminated.
<2> When a start condition is detected, the address is confirmed. If the
<3> For data transmission/reception, when the ready flag is set, operation
<1> to <3> in the above correspond to <1> to <3> in Figure 18-18.
Slave operation flowchart (2)
Preliminary User’s Manual U17566EE1V2UM00
Set ready flag
SPDn = 1?
STDn = 1?
LRELn = 1
address does not match, communication is terminated. If the address
matches, the communication mode is set and wait is released, and
operation returns from the interrupt (the ready flag is cleared).
returns from the interrupt while the IIC0n bus remains in the wait status.
No
No
<3>
Yes
Yes
Communication direction flag ← TRCn
<1>
<2>
Set communication mode flag
Interrupt servicing completed
Clear ready flag
COIn = 1?
Yes
No
I
2
C Bus (IIC)