upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 292

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upd70f3422gj-gae-qs-ax

Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
Chapter 7
292
A[23:0] (output)
Figure 7-17
CSk (output)
D[15:0] (I/O)
WAIT (input)
WR (output)
RD (output)
D[7:0] (I/O)
7.7.1 Half word/word access with 8-bit bus or word access with 16-
BCLK
Note
(1)
bit bus
Read operation
Note that during on-page access, less data wait states are inserted than during
off-page access.
Reading page ROM
• Register settings:
• BCTm.BTk0 = 1 (connected external device is page ROM)
• ASC.ACk[1:0] = 00
• DWCm.DWk[2:0] = 010
• PRC.PRW[2:0] = 001
• BCC.BCk[1:0] = 00
1.
2.
Preliminary User’s Manual U17566EE1V2UM00
access inserted)
access inserted)
The circles indicate the sampling timing.
The broken line indicates the high-impedance state (bus is not driven).
T1
Off-page address
TW
Data
B
B
(no address setup wait states inserted)
(no idle states inserted)
TW
B
(one programmable data wait state for on-page
B
(two programmable data wait states for off-page
T2
Bus and Memory Control (BCU, MEMC)
TO1
On-page address
TOW
Data
TO2

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