upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 464

• Manufacturer Part Number: upd70f3422gj-gae-qs-ax
• Description: 32-bit Single-chip Microcontroller
• Manufacturer: Renesas Electronics Corporation.

Chapter 13
464
(2)
Compare operation (match and clear)
Basic settings (m = 1 to 4):
(a) Example: Interval timer (match and clear)
Setting Method
(1)
(2)
(3)
(4)
(5)
Operation:
(1)
(2)
(3)
Preliminary User’s Manual U17566EE1V2UM00
An usable compare register is one of GCCn1 to GCCn4, and the
corresponding counter must be selected with the TBGnm bit.
Select a count clock cycle with the CSE12 to CSE10 bits (TMGn1) or
CSE02 to CSE00 bits (TMGn0).
Set an upper limit on the value of the counter in GCCn0 or GCCn5.
Write data to GCCnm.
Start timer operation by setting the POWERn bit and TMGxE bit (x = 0, 1).
When the value of the counter matches the value of GCCnm, a match
interrupt (INTCCGnm) is output.
When the value of GCCn0 or GCCn5 matches the value of the counter,
INTCCGn0 (or INTCCGn5) is output, and the counter is cleared. This
operation is referred to as "match and clear".
The counter resumes count-up operation starting with 0000H.
SWFGnm
CCSGnm
CCSGn0
CCSGn5
TBGnm
Bit
Value
X
1
1
0
1
16-bit Multi-Purpose Timer G (TMG)
Remark
match and clear mode
disable TOGnm
Compare mode for
GCCnm
assign counter
for GCCnm
0: TMGn0
1: TMGn1