upd70f3422gj-gae-qs-ax Renesas Electronics Corporation., upd70f3422gj-gae-qs-ax Datasheet - Page 109
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upd70f3422gj-gae-qs-ax
Manufacturer Part Number
upd70f3422gj-gae-qs-ax
Description
32-bit Single-chip Microcontroller
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD70F3422GJ-GAE-QS-AX.pdf
(930 pages)
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CPU System Functions
Bit position
31
R
7
6
5
4
3
2
1
0
Initial Value
Table 3-5
(3)
fixed to 0
SAT
Flag
OV
NP
CY
EP
S
ID
Z
a
PSW - Program status word
The 32-bit program status word is a collection of flags that indicates the status
of the program (result of instruction execution) and the status of the CPU.
If the bits in the register are modified by the LDSR instruction, the PSW will
take on the new value immediately after the LDSR instruction has been
executed.
0000 0020
PSW register contents
Preliminary User’s Manual U17566EE1V2UM00
a
a
Function
Indicates that non-maskable interrupt (NMI) servicing is in progress.
This flag is set when NMI request is acknowledged, and multiple interrupt
servicing is disabled.
Indicates that exception processing is in progress.
This flag is set when an exception occurs. Even when this bit is set, interrupt
requests can be acknowledged.
Indicates whether a maskable interrupt request can be acknowledged.
Note: Setting this flag will disable interrupt requests even while the LDSR
For saturated operation processing instructions only:
Indicates that the operation result is saturated due to overflow.
Note: 1. This is a cumulative flag: The bit is not automatically cleared if
Carry/borrow flag.
Indicates whether a carry or borrow occurred as a result of the operation.
Overflow flag.
Indicates whether an overflow occurred as a result of the operation.
Sign flag.
Indicates whether the result of the operation is negative.
Zero flag.
Indicates whether the result of the operation is zero.
H
0: NMI servicing is not in progress.
1: NMI servicing is in progress.
0: Exception processing is not in progress.
1: Exception processing is in progress.
0: Interrupts enabled.
1: Interrupts disabled.
0: Not saturated.
1: Saturated.
0: Carry or borrow did not occur
1: Carry or borrow occurred.
0: Overflow did not occur.
1: Overflow occurred.
0: Result is positive or zero.
1: Result is negative.
0: Result is not zero.
1: Result is zero.
. The program status is initialized by any reset.
instruction is being executed.
2. In a general arithmetic operation this bit is neglected. It is neither
subsequent instructions lead to not saturated results.
To clear this bit, use the LDSR instruction to set PSW.SAT = 0.
set nor cleared.
R
8
R/W
NP
7
R/W
EP
6
R/W
ID
5
R/W
SAT
4
R/W
CY
3
R/W
OV
2
R/W
Chapter 3
S
1
R/W
Z
0
109
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